Physics Design Engineer - System Productivity EUV (SLIP/Power at wafer level)

Introduction to the job

One of the key challenges on our EUV systems is the so-called SLIP loss. SLIP (SLit Integrated Power) loss refers to the power loss at wafer level. With SLIP loss, less wafers will be exposed leading to Productivity (number of wafer per hour) hit. What is SLIP? Simply said, it is the multiplication of the Source power by the system (Scanner & Source) transmission. The system transmission for its part, depends on the collector in the source and the Illuminator & the Project Optics Box in the Scanner. Ideally transmission loss does not occur, however in reality there are transmission losses from all three modules leading to power loss at the wafer level.
As you will be working on predicting, validating and driving solutions to secure SLIP specs, you will have a direct impact on enabling our external customers to accelerate High Volume Manufacturing for EUV.

Role and responsibilities

• Do you get energized when working on one of the key challenging topics on the advanced ASML EUV systems?
• Do you feel comfortable dealing with ad-hoc requests in a dynamic environment?
• Would you describe yourself as a person who enjoys having a broad knowledge on system level while having enough depths to interact with functional modules engineers?

If you answer yes to these questions then you have the right mindset to be successful in this position.

Main Responsibilities:

• Monitor field (population) data and perform analyses to identify trends and initiate design improvement proposals in collaboration with System engineers
• Support the Productivity architect to
• Ensure that the roadmaps of Functional Clusters contributing to SLIP KPIs are aligned with Productivity roadmap
• Improve SLIP budget breakdown
• Report your prediction, field population analysis and design improvements to EUV senior (program) managers
• Handle escalations and troubleshoot SLIP related issues in the field & factory
• Automate the analysis through Python and/or MATLAB coding

Education and experience

Technical University Master or PhD’s (applied) physics

Skills

Working at the cutting edge of tech, you’ll always have new challenges and new problems to solve – and working together is the only way to do that. You won’t work in a silo. Instead, you’ll be part of a creative, dynamic work environment where you’ll collaborate with supportive colleagues. There is always space for creative and unique points of view. You’ll have the flexibility and trust to choose how best to tackle tasks and solve problems.
To thrive in this job, you’ll need the following skills:

• Self-propelling
• Problem solver who combines a strong analytical skills with a pragmatic attitude
• Ability to (easily) interact with various levels of stakeholder: Functional Cluster engineers/architects, project leaders, program managers, marketing, customer support and factory engineers

Diversity & Inclusion

ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that diversity and inclusion is a driving force in the success of our company.

Other information

Context of the position
Within ASML the sector Development & Engineering is responsible for the specification and the design of the ASML products. The department System Performance is responsible for a timely and cost-effectively qualification of overlay, focus, imaging and productivity for functional modules, machines and customer applications. You will be working in a multidisciplinary project team, in a dynamic and high-tech environment.

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