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FPGA Design Engineer – Mid Career
Research & development
Other technical job categories
In a nutshell
San Diego - CA, US
Research & development
Electrical engineering, Other technical job categories
Introduction to the job
ASML brings together the most creative minds in science, technology and engineering to develop lithography systems that are key to producing faster, cheaper, more energy-efficient semiconductor products. We design, develop, integrate, market and service these advanced machines, which enable our customers - the world’s leading chipmakers – to reduce the size and increase the functionality of their microchips, which in turn leads to smaller, more powerful consumer electronics. ASML is headquartered in Veldhoven, the Netherlands, and has 18 office locations around the United States. We are currently hiring for FPGA Design engineering positions at our San Diego, CA location.
If you have a passion for technology and innovation you’ll want to check us out. Be a part of ASML. Be a part of progress.
One Company, One Goal, Limitless Innovation. It's our people that make the difference.
This position requires access to controlled technology, as defined in the Export Administration Regulations (15 C.F.R. § 730, et seq.). Qualified candidates must be legally authorized to access such controlled technology prior to beginning work. Business demands may require ASML to proceed with applicants who are immediately eligible to access controlled technology.
Role and responsibilities
Contribute to the specification, design, implementation and validation of FPGAs within highly reliable electronics for ASML's EUV systems. Participate in cross-functional teams and work with multiple engineering groups to outline and create FPGA designs and associated engineering documentation. Design, implement and test new FPGA features while using robust methodologies defined as a part of the design process. Work with advanced technologies including digital communication (PCIe, 1G+ Ethernet,EtherCAT, SRIO), photo-detectors, signal acquisition, and distributed high precision timestamping. Assist cross-functional teams with the integration of the FPGA designs into the system environment.Past experience with a variety of interfacing standards such as LVDS, LVPECL, LVCMOS a plus.
- Incorporate new features and enhancements of existing design based on specification and system requirements.
- Design and develop new protocols to ensure communication of new modules are covered utilizing existing design constraints.
- Development of new protocols over existing design interfaces and enhancement of existing designs to include new metrics to relay between modules.
- Ability to clearly document & communicate requirements and design details.
- Ensure the total design meets timing, not just features added.
- Document test plan and follow release processes.
- Validate design interfaces in the lab.
Education and experience
- 3-5+ years’ industry experience in FPGA design, design constraints, design validation and qualification required.
- Proficient in hardware development tools and IDE for Xilinx (Vivado) and/or Altera (Quartus), hardware testing (VIO/ILA/ChipScope, etc.), and simulation at a module level, chip level and interchip level.
- Demonstrated proficiency in hardware languages (VHDL for design, System Verilog for verification)
- Experience with description language System RDL
- Experience in taking Simulink design targeting the FPGA in VHDL meeting timing budgets and LUT/LEcount constraints
- Experience with automated self-checking test bench verification
- Ability to translate requirements into design
- Document design effort by way of memory map, block diagrams (e.g. Visio), tables and text
- Ability to work independently as well as the ability to communicate and collaborate with the FPGA team.
- Reverse engineer VHDL to block diagrammatic view for design reviews and documentation
- BSEE or related engineering degree required.
Diversity & Inclusion
ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that diversity and inclusion is a driving force in the success of our company.
EOE AA M/F/Veteran/Disability
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