Measuring accuracy

Diffraction

YieldStar is a diffraction-based optical metrology system which applies the simple fact that an object’s shape determines how light reflects from it. For example, shine a beam of light onto a repeating pattern of lines on a wafer, and you can easily predict what the resulting pattern of scattered light should look like. If you collect the scattered light using a high-resolution digital camera, you can quickly determine how well the prediction matches reality and thus how well the pattern of lines has been printed.

Fast, accurate wafer metrology

In wafer metrology, key manufacturing parameters such as overlay (the accuracy with which two layers of a chip are aligned) and focus (how sharp the image is) are monitored by measuring how well a particular repeating pattern (the ‘metrology target’) is printed on the wafer. These measurements are made at marked locations across the wafer.

Integrated into the production line

Prior to YieldStar, wafers were taken out of the production line to be measured manually. By integrating our solution into the production line (or ‘track’), chipmakers can now use YieldStar to gather their metrology data quickly and accurately, offering better control over their production processes. Metrology data is analyzed using control software and fed back to the lithography system in real-time, enabling customers to tune the manufacturing process further for optimal yield.

From repeating patterns to real structures

Our latest developments in diffraction-based metrology feature new optics technologies to generate more accurate data, faster, measuring thousands of data points for each batch of wafers. YieldStar matches the productivity of our lithography systems for wafer-to-wafer control on the most advanced chip nodes. Additionally, YieldStar is used for after-etch metrology to inspect actual device structures with more accuracy and higher measuring speeds than our competitors’ scanning electron microscope (SEM) solutions.

‘E’ is for ‘electron’

E-beam technology has been around for decades. The basic concept is that a metal wire is heated until it gives off electrons, which are accelerated and formed into a beam by electric and magnetic fields. Unlike visible and ultraviolet light (but just like extreme ultraviolet light) electron beams must travel in a vacuum so they are not deflected or absorbed before reaching the target.

In metrology and inspection in the semiconductor industry, the e-beam scans across the wafer. The electrons strike the surface and penetrate a small distance into the material, generating new 'secondary electrons' before being scattered. Just as with diffraction-based measurements, measuring the scattering of secondary electrons allows us to build up a very high-resolution picture of the surface. The more focused the beam, the smaller the details that can be measured.

Speeding up e-beam imaging

The tricky thing with e-beam measurements is that they’re quite slow. As a result, they have only typically been used in the early R&D phase of chip manufacturing, where time is less of an issue.

ASML is leading the way in speeding up e-beam measurements so that manufacturers can enjoy their benefits in volume production. One way we do that is by developing solutions that focus e-beam measurements on specific hotspots where defects are more likely or more critical.

Multibeam inspection

Our most recent e-beam system, the HMI eScan 1000, combines high-resolution e-beam measurements with state-of-the-art computational modeling, machine learning algorithms and data from the lithography system.

The HMI eScan 1000 uses multiple e-beams to inspect a greater surface area of the wafer faster. First shipped to customers in May, 2020,  the eScan 1000 is a 3x3 multibeam system that can increase throughput by around a factor of nine. But we don't intend to stop there – we plan to increase the number of beams and beam resolution for future generations to align with chipmakers’ product roadmap requirements.

In-line wafer and reticle inspection

By speeding up the process and narrowing down the search to specific areas, e-beam can be used directly in the production line for wafer inspection while maintaining productivity levels.

Everything counts

A lithography system (scanner) must work 24/7 with sub-nanometer precision, while accelerating mechatronic modules at incredible speeds. For example, the reticle stage accelerates at close to 16g and the wafer stage to 7g. That’s more acceleration than a jet fighter.

It’s not possible to mechanically construct a machine capable of this level of alignment and precision, accelerating at those speeds, and with the level of reliability and repeatability required to make today’s computer chips without the help of in-scanner metrology.

Chip by chip adjustments

Lithography systems are the most ‘tweakable’ tool in the chipmaking process. There are a multitude of ‘knobs’ within the system that can be used to make small adjustments specific to each individual chip on each wafer.

By constantly measuring the behavior of the lithography system, in-scanner metrology is used calculate and then coordinate the many tiny adjustments that need to be made by the physical components (the ‘knobs’) to optimize the pattern on every microchip.

Hundreds of sensors, including position, temperature, energy and motion sensors, measure every aspect within the system. Advanced algorithms are used to interpret these large volumes of data and coordinate the necessary tweaks in very minor but detailed ways, at the sub-nanometer scale, using thousands of actuators.

Enabling 3D chip architecture

In-scanner metrology plays a particularly critical role in ensuring the quality of a certain type of memory chip, known as 3D NAND. These are the flash memory chips used in SD cards, solid state hard drives and smartphones. Previously made in 2D, the introduction of 3D technology was a game-changer for memory chips.

Stacking memory cells on top of each other greatly increases storage and enables the chips to run more efficiently and use less energy. But these chips are complex to make and a challenge to measure. 3D NAND chipmakers have to fabricate the intricate structures found on a 2D chip, and then line them up in the vertical plane, connecting them using tiny vertical channels.

Many metrology systems can’t penetrate these 3D structures to look inside the chip to detect fabrication issues, so production relies heavily on in-scanner metrology software to optimize quality. By analyzing the vast amount of data generated while layers are added in the lithography system, the software feeds this back to optimize alignment and overlay.

Delivering the data

A single lithography system can generate up 31 terabytes of data per week from its sensors alone – that’s three times more than the Hubble Space Telescope gathers in a year.

The vision for PFC is to draw relevant data from wherever possible in the microchip development and production processes. To do that, we work together with other semiconductor equipment makers in the fab to bring the most benefit to chipmakers.

We gather and use data from systems including the YieldStar metrology systems, e-beam inspection tools and wafer mapping within our lithography systems. We also leverage information from our computational lithography solutions, as well as any non-ASML equipment on the production line. Finally, we are developing a range of pattern fidelity metrology options that harness the high resolution of e-beam measurements in ways that can be integrated into the production line.

Data analysis

Working with domain experts in specialist fields such as overlay performance or illumination configuration, the vast amount of data we collect is first manually pre-processed to remove any spurious relationships (where the domain experts see a correlation but know there is no causal relationship). That data is then analyzed with advanced computer models and machine learning algorithms to uncover interactions between the many factors that contribute to defects, affecting the performance of the finished microchip. Finally, we calculate suitable corrections, which are then applied in the lithography system. This will deliver the advanced control that manufacturers need for sub-10 nm features.